Design Name | BoardTest |
Device, Speed (SpeedFile Version) | XC9536XL, -5 (3.0) |
Date Created | Mon Jul 07 22:45:14 2008 |
Created By | Timing Report Generator: version K.37 |
Copyright | Copyright (c) 1995-2008 Xilinx, Inc. All rights reserved. |
Notes and Warnings |
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Note: This design contains no timing constraints. |
Note: A default set of constraints using a delay of 0.000ns will be used for analysis. |
Performance Summary | |
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Min. Clock Period | 5.600 ns. |
Max. Clock Frequency (fSYSTEM) | 178.571 MHz. |
Limited by Clock Pulse Width for Clk | |
Setup to Clock at the Pad (tSU) | 3.700 ns. |
Clock Pad to Output Pad Delay (tCO) | 3.500 ns. |
Constraint Name | Requirement (ns) | Delay (ns) | Paths | Paths Failing |
---|---|---|---|---|
TS1000 | 0.0 | 0.0 | 0 | 0 |
AUTO_TS_F2F | 0.0 | 0.0 | 0 | 0 |
AUTO_TS_P2P | 0.0 | 3.5 | 8 | 8 |
AUTO_TS_P2F | 0.0 | 4.8 | 17 | 17 |
AUTO_TS_F2P | 0.0 | 2.4 | 8 | 8 |
Path | Requirement (ns) | Delay (ns) | Slack (ns) |
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Path | Requirement (ns) | Delay (ns) | Slack (ns) |
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Path | Requirement (ns) | Delay (ns) | Slack (ns) |
---|---|---|---|
Clk to Led<0> | 0.000 | 3.500 | -3.500 |
Clk to Led<1> | 0.000 | 3.500 | -3.500 |
Clk to Led<2> | 0.000 | 3.500 | -3.500 |
Path | Requirement (ns) | Delay (ns) | Slack (ns) |
---|---|---|---|
DipSwitch<0> to Led<0>.D | 0.000 | 4.800 | -4.800 |
DipSwitch<1> to Led<1>.D | 0.000 | 4.800 | -4.800 |
DipSwitch<2> to Led<2>.D | 0.000 | 4.800 | -4.800 |
Path | Requirement (ns) | Delay (ns) | Slack (ns) |
---|---|---|---|
Led<0>.Q to Led<0> | 0.000 | 2.400 | -2.400 |
Led<1>.Q to Led<1> | 0.000 | 2.400 | -2.400 |
Led<2>.Q to Led<2> | 0.000 | 2.400 | -2.400 |
Clock | fEXT (MHz) | Reason |
---|---|---|
Clk | 178.571 | Limited by Clock Pulse Width for Clk |
Source Pad | Setup to clk (edge) | Hold to clk (edge) |
---|---|---|
DipSwitch<0> | 3.700 | 0.000 |
DipSwitch<1> | 3.700 | 0.000 |
DipSwitch<2> | 3.700 | 0.000 |
DipSwitch<3> | 3.700 | 0.000 |
DipSwitch<4> | 3.700 | 0.000 |
DipSwitch<5> | 3.700 | 0.000 |
DipSwitch<6> | 3.700 | 0.000 |
DipSwitch<7> | 3.700 | 0.000 |
Reset | 3.700 | 0.000 |
Destination Pad | Clock (edge) to Pad |
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Led<0> | 3.500 |
Led<1> | 3.500 |
Led<2> | 3.500 |
Led<3> | 3.500 |
Led<4> | 3.500 |
Led<5> | 3.500 |
Led<6> | 3.500 |
Led<7> | 3.500 |
Source Pad | Destination Pad | Delay |
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